The DEMO Joint Research Building has been constructed, based on the agreement of EU and JA to enhance research activities in the remaining Broader Approach (BA) period.
The 18th International Fusion Energy Research Centre(IFERC) Project Committee (IFERC PC-18) meeting was held at Tohoku University
The 7th Technical Coordination Meeting (TCM-7) of DEMO Design Activity (DDA) was held at Nagoya University (hosted by Prof. N. Ohno) on 1st-2nd February.
The 6th Joint Technical Coordination Meeting (JTCM-6) between Demo design and R&D was held on 3 February 2016 at Nagoya University.
The call for proposals for the use of the IFERC-CSC supercomputer has been closed. CSC Announcement
Advanced divertor study will provide new options of the magnetic configuration, e.g. Short Super-X Divertor (SXD).
JEOL JEM2100F Transmission Electron Microscope equipped with Energy-Dispersive X-ray Spectrometer (EDS), Scanning Transmission Electron Microscope (STEM), Electron Energy Loss Spectrometer (EELS) and energy filter, capable of not only obtaining sub-nano scale high-resolution micrograph but also to achieve high-resolution chemical composition analysis.
JEOL JXA-8530F Electron Probe Micro Analyzer with five channels of Wavelength Dispersive Spectrometry (WDS) detectors and Energy-Dispersive X-ray Spectrometer (EDS). The machine is equipped with field-emmision gun to achieve higher spacial resolution for high-resolution chemical composition analysis.
Zeiss Ultra-55 Scanning Electron Microscope equipped with conventional Silicon Drift Detector (SDD) type Energy-Dispersive X-ray Spectrometer (EDS) (EDAX), Electron Backscatter Diffraction (EBSD) (TSL) and micro-EDS (Hitachi High-Tech), with which high-resolution chemical analysis is possible. Micro-EDS is one of a calorimeter type X-ray detector with an energy resolution of around 14eV or higher, which is about 10 times higher than conventional Energy-Dispersive X-ray Spectrometer (EDS) .
The operation of Intel Xeon Phi native mode began concurrently with the beginning of the 4th CSC project cycle. With 180 MIC nodes, each comprising two Intel Sandy Bridge processors and two Intel Xeon Phi co-processors, a total of 24480 cores (21600 of them on the co-processors) is available for accelerating applications.