Results of DEMO Design Activity (DDA) and R&D were presented in 28th Symposium on Fusion Technology (SOFT 2014) on 29th September – 3rd October 2014.
system at Rokkasho has been extended with a new computer rack on 7th August 2014. As a result, the Helios system with 4500 nodes(72000 cores) in total is now available for users.
Advanced divertor study will provide new options of the magnetic configuration, e.g. Short Super-X Divertor (SXD).
13th DEMO R&D WS and the 3rd DEMO Joint Technical Coordination Meeting (JTCM-3) was held at Fusion for Energy in Barcelona on 25-26 September 2014.
The 5th Technical Coordination Meeting (TCM-5) of DEMO Design Activity (DDA) was held at Kyoto University in Japan on 4-5 February 2014
JEOL JEM2100F Transmission Electron Microscope equipped with Energy-Dispersive X-ray Spectrometer (EDS), Scanning Transmission Electron Microscope (STEM), Electron Energy Loss Spectrometer (EELS) and energy filter, capable of not only obtaining sub-nano scale high-resolution micrograph but also to achieve high-resolution chemical composition analysis.
JEOL JXA-8530F Electron Probe Micro Analyzer with five channels of Wavelength Dispersive Spectrometry (WDS) detectors and Energy-Dispersive X-ray Spectrometer (EDS). The machine is equipped with field-emmision gun to achieve higher spacial resolution for high-resolution chemical composition analysis.
Zeiss Ultra-55 Scanning Electron Microscope equipped with conventional Silicon Drift Detector (SDD) type Energy-Dispersive X-ray Spectrometer (EDS) (EDAX), Electron Backscatter Diffraction (EBSD) (TSL) and micro-EDS (Hitachi High-Tech), with which high-resolution chemical analysis is possible. Micro-EDS is one of a calorimeter type X-ray detector with an energy resolution of around 14eV or higher, which is about 10 times higher than conventional Energy-Dispersive X-ray Spectrometer (EDS) .
The 4th CSC Project Cycle Started on 2 December 2014. Start Date: 2 December 2014 End Date: 14 November 2015
The operation of Intel Xeon Phi native mode began concurrently with the beginning of the 4th CSC project cycle. With 180 MIC nodes, each comprising two Intel Sandy Bridge processors and two Intel Xeon Phi co-processors, a total of 24480 cores (21600 of them on the co-processors) is available for accelerating applications.